# Nanoscale Computing

3D Crosspoint Memory as a Parallel Architecture for Computing Network Reachability
,” in IEEE International Conference on Computer Design (ICCD), Forthcoming.Abstract

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Parallel Transitive Closure Within 3D Crosspoint Memory
,” in ACM Symposium on Parallelism in Algorithms and Architectures, Vienna, Austria, 2018.

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Free BDD based Computer-aided Design of Compact Memristor Crossbars for in-Memory Computing
,” in 14th IEEE / ACM International Symposium on Nanoscale Architectures (NANOARCH), Athens, Greece, 2018.

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Free Binary Decision Diagram Based Synthesis of Compact Crossbars for in-Memory Computing of Boolean Functions
,” in International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018.Abstract iscas2018.pdf

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Fault-Tolerant In-Memory Computing Using Paths-Based Logic and Heterogeneous Components
,” in Design, Automation, and Test in Europe (DATE), Dresden, Germany, 2018.Abstract

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In-Memory Execution of Compute Kernels using Flow-based Memristive Crossbar Computing
,” in IEEE International Conference on Rebooting Computing 2017, Washington D.C., 2017.Abstract icrc2017.pdf

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A Compact 8-bit Adder Design using In-Memory Memristive Computing: Towards Solving the Feynman Grand Prize Challenge
,” in 13th ACM/IEEE International Symposium on Nanoscale Architectures, Newport, USA, 2017, pp. in press.Abstract feynmangrandprize_nanoarch2017.pdf

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Computation of Boolean Matrix Chain Products in 3D ReRAM
,” in IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, 2017, pp. 2643-2646.Abstract 3d_reram_iscas_2017.pdf

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Design of Compact Memristive In-Memory Computing Systems using Model Counting
,” in IEEE International Symposium on Circuits and Systems (ISCAS)., Baltimore, MD, 2017, pp. 2655-2658.Abstract MLnFM_iscas2017.pdf

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Computation of boolean formulas using sneak paths in crossbar computing
”, US Patent: 9319047, 2016. patent2016_memristorcomputing_jha.pdf

, “US Patent 9,319,047

Flow-based computing on nanoscale crossbars: Design and implementation of full adders
,” in Circuits and Systems (ISCAS), 2016 IEEE International Symposium on, 2016, pp. 1870–1873. iscas2016_flowmemristor_jha_01.pdf

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Parallel boolean matrix multiplication in linear time using rectifying memristors
,” in Circuits and Systems (ISCAS), 2016 IEEE International Symposium on, 2016, pp. 1874–1877. iscas2016_parallel_memristor_jha.pdf

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Parallel computing using memristive crossbar networks: Nullifying the processor-memory bottleneck
,” in Design & Test Symposium (IDT), 2014 9th International, 2014, pp. 147–152.Abstract idt2014.pdf

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